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ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
16 years 23 days ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman
SKG
2006
IEEE
16 years 22 days ago
A Knowledge Grid Architecture Based on Mobile Agent
The performance of services implemented in the serviceoriented knowledge grid becomes one of the most key issues that affect the development of the knowledge grid. This paper pres...
Gang Wang, Tao Wen, Quan Guo, Xuebin Ma
ETFA
2005
IEEE
16 years 10 days ago
A security architecture for data privacy and security
Data access and software exchange are often achieved over insecure networks such as the public Internet. System designers are therefore forced to be proactive with regard to verif...
Alfred C. Weaver
ICDCSW
2005
IEEE
16 years 10 days ago
A Distributed Architecture for Management and Retrieval of Extended Points of Interest
This paper presents a distributed architecture for the management and retrieval of particular objects called POIsmarts. POIsmarts can be considered as the convergence between virt...
Claudio Bettini, Nicolò Cesa-Bianchi, Danie...
ISCAS
2005
IEEE
145views Hardware» more  ISCAS 2005»
16 years 10 days ago
A switched delay line based optical switch architecture with a bypass line
—This paper proposes a new switching architecture to be used in all optical networks. The proposed switch, M-B-Quadro switch, is extended from an original 2 x 2 two-stage multi-b...
Ho-Ting Wu, Kai-Wei Ke, Wang-Rong Chang, Hui-Tang ...