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TSMC
1998
62views more  TSMC 1998»
15 years 6 months ago
Performance based design of high-level language-directed computer architectures
— This paper is concerned with the analytical modeling of computer architectures to aid in the design of high-level language-directed computer architectures. High-level language-...
Rajendra S. Katti, Mark L. Manwaring
PVLDB
2010
119views more  PVLDB 2010»
15 years 5 months ago
An Architecture for Parallel Topic Models
This paper describes a high performance sampling architecture for inference of latent topic models on a cluster of workstations. Our system is faster than previous work by over an...
Alexander J. Smola, Shravan Narayanamurthy
163
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ICCD
2004
IEEE
129views Hardware» more  ICCD 2004»
16 years 3 months ago
Cache Array Architecture Optimization at Deep Submicron Technologies
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...
Annie (Yujuan) Zeng, Kenneth Rose, Ronald J. Gutma...
DSD
2008
IEEE
136views Hardware» more  DSD 2008»
16 years 1 months ago
Flexible Baseband Architectures for Future Wireless Systems
— The mobile communication systems today, have different radio spectrum, radio access technologies, and protocol stacks depending on the network being utilized. This gives rise t...
Najam-ul-Islam Muhammad, Rizwan Rasheed, Renaud Pa...
GLOBECOM
2006
IEEE
16 years 23 days ago
Fast Stochastic Analysis of P2P File Distribution Architectures
— In this paper we investigate which is the most efficient architecture and protocol that can be used for file distribution. The focus of the analysis is to understand not only...
Damiano Carra, Renato Lo Cigno, Ernst W. Biersack