6188 search results - page 102 / 1238 » A DoS-limiting network architecture |
174
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IPPS
2007
IEEE
16 years 22 days ago
2007
IEEE
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
148
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CIKM
1999
Springer
15 years 10 months ago
1999
Springer
Large scale networked image retrieval systems face a number of problems that are not fully satis ed by current systems. On one hand, integrated solutions that store all image data...
192
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ESANN
1998
15 years 7 months ago
1998
Abstract. In this paper, we focus on a novel NN/HMM architecture for continuous speech recognition. The architecture incorporates a neural feature extraction to gain more discrimin...
207
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WISES
2003
15 years 7 months ago
2003
— Steadily growing microcontroller capabilities at an ever decreasing cost per operation encourage the development of more extensive and smarter applications in the domain of emb...
204
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VLSID
2004
IEEE
16 years 6 months ago
2004
IEEE
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...