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ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
15 years 10 months ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
16 years 1 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
ERSHOV
2006
Springer
15 years 10 months ago
Streaming Networks for Coordinating Data-Parallel Programs
A new coordination language for distributed data-parallel programs is presented, call SNet. The intention of SNet is to introduce advanced structuring techniques into a coordinatio...
Clemens Grelck, Sven-Bodo Scholz, Alexander V. Sha...
IPPS
2003
IEEE
15 years 12 months ago
Cost/Performance Tradeoffs in Network Interconnects for Clusters of Commodity PCs
The definition of a commodity component is quite obvious when it comes to the PC as a basic compute engine and building block for clusters of PCs. Looking at the options for a mo...
Christian Kurmann, Felix Rauch, Thomas Stricker
ICDCSW
2003
IEEE
15 years 12 months ago
Gateway: A Message Hub with Store-and-Forward Messaging in Mobile Networks
To obtain good performance in messaging over mobile networks, we have developed a Gateway. Gateway is a message hub that transmits information using store-and-forward messaging an...
Eiko Yoneki, Jean Bacon