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HPCA
2006
IEEE
16 years 7 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
HPCA
2005
IEEE
16 years 7 months ago
A Small, Fast and Low-Power Register File by Bit-Partitioning
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
Masaaki Kondo, Hiroshi Nakamura
HPCA
2005
IEEE
16 years 7 months ago
A Performance Comparison of DRAM Memory System Optimizations for SMT Processors
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
Zhichun Zhu, Zhao Zhang
OSDI
2008
ACM
16 years 7 months ago
CuriOS: Improving Reliability through Operating System Structure
An error that occurs in a microkernel operating system service can potentially result in state corruption and service failure. A simple restart of the failed service is not always...
Francis M. David, Ellick Chan, Jeffrey C. Carlyle,...
SIGMOD
2003
ACM
179views Database» more  SIGMOD 2003»
16 years 7 months ago
Energy and rate based MAC protocol for wireless sensor networks
Abstract-- Sensor networks are typically unattended because of their deployment in hazardous, hostile or remote environments. This makes the problem of conserving energy at individ...
Rajgopal Kannan, Ramaraju Kalidindi, S. Sitharama ...
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