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» A Distributed Parallel Programming Framework
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ISLPED
2006
ACM
105views Hardware» more  ISLPED 2006»
16 years 19 days ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
Mahmut T. Kandemir, Seung Woo Son
PPOPP
2003
ACM
15 years 12 months ago
Compiler support for speculative multithreading architecture with probabilistic points-to analysis
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Ro...
SC
1995
ACM
15 years 10 months ago
Predicting Application Behavior in Large Scale Shared-memory Multiprocessors
In this paper we present an analytical-based framework for parallel program performance prediction. The main thrust of this work is to provide a means for treating realistic appli...
Karim Harzallah, Kenneth C. Sevcik
CAV
2008
Springer
131views Hardware» more  CAV 2008»
15 years 8 months ago
Validating High-Level Synthesis
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
GLVLSI
2007
IEEE
154views VLSI» more  GLVLSI 2007»
16 years 1 months ago
A design kit for a fully working shared memory multiprocessor on FPGA
This paper presents a framework to design a shared memory multiprocessor on a programmable platform. We propose a complete flow, composed by a programming model and a template ar...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...