18469 search results - page 3457 / 3694 » A Distributed Image-Understanding System |
163
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ICS
2009
Tsinghua U.
16 years 1 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
178
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ICS
2009
Tsinghua U.
16 years 1 months ago
2009
Tsinghua U.
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
164
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
In modern digital ICs, the increasing demand for performance and throughput requires operating frequencies of hundreds of megahertz, and in several cases exceeding the gigahertz r...
205
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ICAC
2009
IEEE
16 years 1 months ago
2009
IEEE
In data centers hosting scaling Internet applications, operators face the tradeoff dilemma between resource efficiency and Quality of Service (QoS), and the root cause lies in wo...
175
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IEEEPACT
2009
IEEE
16 years 1 months ago
2009
IEEE
—Shared cache allocation policies play an important role in determining CMP performance. The simplest policy, LRU, allocates cache implicitly as a consequence of its replacement ...