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VLSID
2001
IEEE
144views VLSI» more  VLSID 2001»
16 years 7 months ago
Next Generation Network Processors
Networking hardware manufacturers face the dual demands of supporting ever increasing bandwidth requirements, while also delivering new features, such as the ability to implement ...
Deepak Kataria
DAC
2003
ACM
16 years 7 months ago
A TBR-based trajectory piecewise-linear algorithm for generating accurate low-order models for nonlinear analog circuits and MEM
In this paper we propose a method for generating reduced models for a class of nonlinear dynamical systems, based on truncated balanced realization (TBR) algorithm and a recently ...
Dmitry Vasilyev, Michal Rewienski, Jacob White
SIGMOD
2009
ACM
218views Database» more  SIGMOD 2009»
16 years 6 months ago
DejaVu: declarative pattern matching over live and archived streams of events
DejaVu is an event processing system that integrates declarative pattern matching over live and archived streams of events on top of a novel system architecture. We propose to dem...
Nihal Dindar, Baris Güç, Patrick Lau, ...
DAC
2006
ACM
16 years 7 months ago
A parallelized way to provide data encryption and integrity checking on a processor-memory bus
This paper describes a novel engine, called PE-ICE (Parallelized Encryption and Integrity Checking Engine), enabling to guarantee confidentiality and integrity of data exchanged b...
Reouven Elbaz, Lionel Torres, Gilles Sassatelli, P...
DAC
2007
ACM
16 years 7 months ago
Compact State Machines for High Performance Pattern Matching
Pattern matching is essential to a wide range of applications such as network intrusion detection, virus scanning, etc. Pattern matching algorithms normally rely on state machines...
Piti Piyachon, Yan Luo