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» A Design System based on Architectural Representations
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ANCS
2005
ACM
16 years 5 days ago
Resource mapping and scheduling for heterogeneous network processor systems
Task to resource mapping problems are encountered during (i) hardware-software co-design and (ii) performance optimization of Network Processor systems. The goal of the first pro...
Liang Yang, Tushar Gohad, Pavel Ghosh, Devesh Sinh...
180
Voted
CG
2005
Springer
15 years 6 months ago
Intelligent virtual environments for virtual reality art
The development of virtual reality (VR) art installations is faced with considerable difficulties, especially when one wishes to explore complex notions related to user interactio...
Marc Cavazza, Jean-Luc Lugrin, Simon Hartley, Marc...
DSN
2002
IEEE
15 years 11 months ago
Generic Timing Fault Tolerance using a Timely Computing Base
Designing applications with timeliness requirements in environments of uncertain synchrony is known to be a difficult problem. In this paper, we follow the perspective of timing ...
Antonio Casimiro, Paulo Veríssimo
CODES
2004
IEEE
15 years 10 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
FPGA
2006
ACM
117views FPGA» more  FPGA 2006»
15 years 10 months ago
Context-free-grammar based token tagger in reconfigurable devices
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...
Young H. Cho, James Moscola, John W. Lockwood