We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
This paper describes the design and implementation of hardware architectures for posture analysis. Posture analysis is an active research area in computer vision. It can be used i...
In this paper we describe our experience in performance analysis of the software architecture of the NICE case study which is responsible for providing several secure communicatio...
Simonetta Balsamo, Moreno Marzolla, Antinisca Di M...
In this paper, we present a methodology for customized communication architecture synthesis that matches the communication requirements of the target application. This is an impor...