Retiming has been proposed as an optimizationstep forsequential circuits represented at the net-list level. Retiming moves the latches across the logic gates and in doing so chang...
Vigyan Singhal, Carl Pixley, Richard L. Rudell, Ro...
We propose a framework for the formal speci cation and veri cation of timed and hybrid systems. For timed systems we propose a speci cation language that refers to time only throug...
We describe an architecture for representing and managing context shifts that supports dynamic data interpretation. This architecture utilizes two layers of learning and three lay...
Nikita A. Sakhanenko, George F. Luger, Carl R. Ste...
In this paper, we present the power estimation methodologies for the development of a low-power security processor that contains significant amount of logic and memory. For the lo...
The need for process support in the context of web services has triggered the development of many languages, systems, and standards. Industry has been developing software solutions...