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ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
16 years 14 days ago
Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation
— The fully parallel LDPC decoding architecture can achieve high decoding throughput, but it suffers from large hardware complexity caused by a large set of processing units and ...
In-Cheol Park, Se-Hyeon Kang
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
16 years 14 days ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
ISESE
2005
IEEE
16 years 14 days ago
Contextual reusability metrics for event-based architectures
Component Based Software Engineering has been perceived to have immense reuse potential. This area has evoked wide interest and has led to considerable investment in research and ...
Sutirtha Bhattacharya, Dewayne E. Perry
P2P
2005
IEEE
104views Communications» more  P2P 2005»
16 years 14 days ago
Range Queries in Trie-Structured Overlays
Among the open problems in P2P systems, support for non-trivial search predicates, standardized query languages, distributed query processing, query load balancing, and quality of...
Anwitaman Datta, Manfred Hauswirth, Renault John, ...
SAINT
2005
IEEE
16 years 14 days ago
A Context-centric Security Middleware for Service Provisioning in Pervasive Computing
Pervasive user mobility, wireless connectivity and the widespread diffusion of portable devices raise new challenges for ubiquitous service provisioning. An emerging architecture ...
Antonio Corradi, Rebecca Montanari, Daniela Tibald...
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