In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Our research is motivated by a strong conviction that business processes in electronic enterprises can be designed to deliver high levels of performance through the use of mathemat...
This paper describes a new collision detection algorithm designed for interactive manipulation in virtual environments. Making some assumptions on objects motion, the collision ti...
In this paper we propose differential eligibility vectors (DEV) for temporal-difference (TD) learning, a new class of eligibility vectors designed to bring out the contribution of...
The existing decoupling capacitance optimization approaches meet constraints on input impedance for package. In this paper, we show that using impedance as constraints leads to la...