495 search results - page 61 / 99 » A Compiler for the Smart Space |
195
click to vote
LCTRTS
1999
Springer
15 years 10 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
186
click to vote
ASPLOS
1998
ACM
15 years 10 months ago
1998
ACM
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
163
click to vote
HICSS
1997
IEEE
15 years 10 months ago
1997
IEEE
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
152
click to vote
IFL
1997
Springer
15 years 10 months ago
1997
Springer
Common subexpression elimination is a well-known compiler optimisation that saves time by avoiding the repetition of the same computation. In lazy functional languages, referential...
235
click to vote
PLDI
1993
ACM
15 years 10 months ago
1993
ACM
Data locality is critical to achievinghigh performance on large-scale parallel machines. Non-local data accesses result in communication that can greatly impact performance. Thus ...