495 search results - page 53 / 99 » A Compiler for the Smart Space |
201
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MICRO
1997
IEEE
15 years 10 months ago
1997
IEEE
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
189
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CASES
2007
ACM
15 years 10 months ago
2007
ACM
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
144
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HIPEAC
2010
Springer
15 years 8 months ago
2010
Springer
We present Offload, a programming model for offloading parts of a C++ application to run on accelerator cores in a heterogeneous multicore system. Code to be offloaded is enclosed ...
125
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JEA
2006
15 years 6 months ago
2006
In this paper we show cache-friendly implementations of the Floyd-Warshall algorithm for the All-Pairs ShortestPath problem. We first compare the best commercial compiler optimiza...
181
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ASPLOS
2011
ACM
14 years 10 months ago
2011
ACM
Transiently powered computing devices such as RFID tags, kinetic energy harvesters, and smart cards typically rely on programs that complete a task under tight time constraints be...