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IEEEPACT
2002
IEEE
15 years 11 months ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
ISCA
2000
IEEE
99views Hardware» more  ISCA 2000»
15 years 10 months ago
Transient fault detection via simultaneous multithreading
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
Steven K. Reinhardt, Shubhendu S. Mukherjee
PAMI
2011
15 years 1 months ago
Matching Forensic Sketches to Mug Shot Photos
—The problem of matching a forensic sketch to a gallery of mug shot images is addressed in this paper. Previous research in sketch matching only offered solutions to matching hig...
Brendan Klare, Zhifeng Li, Anil K. Jain
DAC
2007
ACM
16 years 7 months ago
Physical Unclonable Functions for Device Authentication and Secret Key Generation
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that...
G. Edward Suh, Srinivas Devadas
DAC
2001
ACM
16 years 7 months ago
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
Li Chen, Xiaoliang Bai, Sujit Dey