Sciweavers

1747 search results - page 218 / 350
» A Comparative Analysis of Architecture Frameworks
Sort
View
ISMVL
2010
IEEE
174views Hardware» more  ISMVL 2010»
15 years 11 months ago
Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits
—Fixed-point multiplication architectures are designed and evaluated using a set of logic cells based on a radix-4, quaternary number system. The library of logic circuits is bas...
Satyendra R. Datla, Mitchell A. Thornton
ICPP
2000
IEEE
15 years 11 months ago
Evaluation of Loop Grouping Methods Based on Orthogonal Projection Spaces
This paper compares three similar loop-grouping methods. All methods are based on projecting the n-dimensional iteration space Jn onto a k-dimensional one, called the projected sp...
Ioannis Drositis, Georgios I. Goumas, Nectarios Ko...
ICPPW
1999
IEEE
15 years 10 months ago
Multistage Ring Network: A New Multiple Ring Network for Large Scale Multiprocessors
We present a new multiple ring network for multiprocessors, called the Multistage Ring Network(MRN). The MRN has a 2-level hierarchy of register insertion rings, and its interconn...
Dongho Yoo, Inbum Jung, Seung Ryoul Maeng, Hyungla...
ASYNC
1997
IEEE
66views Hardware» more  ASYNC 1997»
15 years 10 months ago
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders
This paper presents an in-depth case study in highperformance asynchronous adder design. A recent method, called “speculative completion”, is used. This method uses single-rai...
Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply,...
SIGMETRICS
1990
ACM
129views Hardware» more  SIGMETRICS 1990»
15 years 10 months ago
An Analytical Model of Multistage Interconnection Networks
Multiprocessors require an interconnection network to connect processors with memory modules. The performance of the interconnection network can have a large effect upon overall s...
Darryl L. Willick, Derek L. Eager