In this paper, we present the APFEL plug-in that collects finegrained changes from version archives in a database. APFEL is built upon the Eclipse infrastructure for CVS and Java....
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
Diagram manipulation in conventional CAD systems requires frequent mode switching and explicit placement of the pivot for rotation and scaling. In order to simplify this process, ...
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem duri...
Non-monotonic knowledge evolutions and exceptions constitute a complex theoritical and practical problem. The state of the art shows a rich and surprising diversity of approaches....