1404 search results - page 148 / 281 » A C to Hardware Software Compiler |
213
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LCTRTS
2010
Springer
15 years 4 months ago
2010
Springer
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
168
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CGO
2004
IEEE
15 years 10 months ago
2004
IEEE
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
154
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ICSE
2009
IEEE-ACM
16 years 1 months ago
2009
IEEE-ACM
Minimizing the computing infrastructure (such as processors) in a distributed real-time embedded (DRE) system deployment helps reduce system size, weight, power consumption, and c...
146
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IWSOC
2003
IEEE
15 years 11 months ago
2003
IEEE
The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation method to extra...
187
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ICCD
2000
IEEE
2000
IEEE
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
15 years 10 months ago
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...